Circuit Design Graduate Intern

Job Description

The Group: Intel's Advanced Design Organization (AD) within Design Enablement (DE) is focused on pathfinding and development of advanced logic, memory, and analog/mixed-signal circuits to enable best-in-class Foundational IP collateral and product design across all generations of Intel process technology. Critical technologies AD delivers to Intel are Digital and Analog Standard Cell Libraries, Embedded Memory (SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, DLL, VR, etc.), High-speed I/O Reference Designs (DDR, SerDes, GPIO), RF and Wireless Circuits (Wave Guide TX, Power Amplifier) The Person: As a PROM Mixed-Signal Circuit Designer in DE your day-to-day responsibilities will include, but not always be limited to, utilizing the following skills: Develop, design and test PROM (Programmable Read Only Memory) circuits covering voltage level detectors, bandgap reference, charge pump, PROM arrays and analog to digital converters. Capture of design and measurement results to guide the next generation of process technology and circuit specifications based on requirements for critical analog and mixed-signal IPs. Physical validation of Hard IP to ensure it meets functional, timing, noise, and reliability requirements.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualification:

• BS in Electrical Engineering or related field.
• Must be an actively enrolled and progressing as a student pursuing a Master's degree.
• Must possess a 3.0 minimum GPA to qualify for an internship.
• Experience in scripting languages (Perl, tcl, etc.) to enhance design automation, verification, and delivery.
• Circuit design convergence using industry standard design and validation tools.

Preferred Experience:

• Exploration of novel, robust, competitive circuit solutions (considering power, area and performance) through a variety of techniques.
• Post-Si debug experience from a design perspective, including proposing tests and experiments, and reviewing results.
• Effective schematic capture and behavioral modeling of circuits in Verilog, as well as logical equivalence verification between schematic and Verilog models.
• Physical verification of circuit through layout-extracted static timing analysis (STA), electrical rules' check and noise analysis.
• Reliability verification of layout: IR drop, electro-migration and self-heat analysis.
• Layout strategies, and techniques (including analog techniques) to meet variance, timing, noise, and reliability requirements.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US, OR, Hillsboro; US, AZ, Phoenix; US, CA, Folsom; US, CA, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

Annual Salary Range for jobs which could be performed in the US $63,000.00-$166,000.00

• Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.